Silicon fails above roughly 250°C, but high-temperature logic has historically required bespoke and expensive fabrication processes. A team at Kyoto University led by Mitsuaki Kaneko, Shunya Shibata, and Tsunenobu Kimoto has published in APL Electronic Devices a silicon carbide (SiC) JFET that operates stably at 600°C using standard ion implantation, the same doping technique used in commercial chip fabs. The innovation lies in an architectural combination that eliminates key thermal instability sources without requiring dedicated production lines.

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Bottom-gate design fixes threshold drift

The main issue with conventional SiC JFETs is the channeling effect: during ion implantation, some dopants scatter deeper than intended, shifting the threshold voltage (Vth) by more than 2 volts from its designed value. The bottom-gate layout, which places the gate electrode beneath the channel rather than above it, captures these stray dopants. The result is unprecedented precision: the gap between designed and measured Vth drops to under 0.1V even at 400°C. This stability is critical for logic circuits that must maintain correct switching in extreme environments.

SiC MOSFET的设计挑战——如何平衡性能与可靠性 - 知乎 — https://zhuanlan.zhihu.com/p/630254933

Double-well isolation against leakage currents

The second challenge is the loss of substrate insulation at high temperatures. Kaneko's group adopted a double-well isolation structure that confines each device within a pn junction, rather than relying on the underlying substrate. At 600°C, the measured leakage current was an order of magnitude lower than conventional devices at 400°C, approaching the theoretical limit set by SiC's intrinsic properties. In practice, there is little room left for device-level improvements: the bottleneck is now the material itself.

Compatibility with existing production lines

Unlike NASA Glenn Research Center's integrated circuits, which tested SiC JFETs at 500°C for over a year but on custom epitaxial processes, Kyoto University's work integrates with existing infrastructure. The use of standard ion implantation means this technology can be adopted by current fabs without radical process changes. This is a crucial step for scalability: while SiC already dominates power devices, high-temperature logic remains a small but strategic niche for applications like gas turbines or planetary exploration where silicon cannot survive.

Toward low-power complementary logic

The current transistor is normally-on, meaning it conducts current even without gate voltage and consumes standby power. Building efficient logic circuits requires normally-off devices, which Kimoto's group is now designing. The roadmap includes creating complementary SiC logic gates, already demonstrated at 350°C, to reduce power consumption. However, before reaching real-world applications, challenges regarding long-term reliability and heat-tolerant packaging must be overcome.